VLSI Memory Chip Design

Itoh Kiyoo

ISBN 10: 3540678204 / ISBN 13: 9783540678205

Published by Springer, 2001

About this Item

pp. 508.

Seller Inventory # 18301978

Bibliographic Details

• Title: VLSI Memory Chip Design
• Publisher: Springer
• Publication Date: 2001
• Language: English
• ISBN 10: 3540678204
• ISBN 13: 9783540678205
• Binding: Hardcover
• Condition: New

About this title

Synopsis

The VLSI memory era truly began when the first production of semiconduc­ tor memory was announced by IBM and Intel in 1970. The announcement had a profound impact on my research at Hitachi Ltd. , and I was forced to change fields: from magnetic thin film to semiconductor memory. This change was so exceptionally sudden and difficult, I feIt like a victim of fate. Looking back, however, I realize how fortunate I was. I have witnessed an unprecedented increase in memory capacity (DRAM, for example, has had a 6-order increase in the last three decades - from the 1-Kb level in 1970 to the 1-Gb level today). I have contributed to this progress with full involvement in memory-chip development over my career. Such rapid progress would have been impossible without many of the inventions and innovative technologies, and without the effort of many talented people. Unfortunately, few systematic books on memory-chip design have been written by experts. Tliis is a result of two factors: the difficulty of involving university professors because of rapidly changing technology requiring huge investments and development resources, and a shortage of time on the part of chip designers in industry due to severe competition in the memory-chip business. Therefore, LSI memory-chip design has been isolated from the outside, preventing a deeper understanding of the technology. This book is based on my 30-year memory-chip (particularly DRAM) design career.

From the Back Cover

This book features a systematic description of microelectronic device design ranging from the basics to current topics, such as low-power/ultralow-voltage designs including subthreshold current reduction, memory subsystem designs for modern DRAMs and various on-chip supply-voltage conversion techniques. It also covers process and device issues as well as design issues relating to systems, circuits, devices and processes, such as signal-to-noise and redundancy.