Vlsi Fault Modeling and Testing Techniques

Zobrist, George W. (EDT)

ISBN 10: 0893917818 / ISBN 13: 9780893917814

Published by Praeger, 1993

About this Item

Seller Inventory # 823827-n

Bibliographic Details

• Title: Vlsi Fault Modeling and Testing Techniques
• Publisher: Praeger
• Publication Date: 1993
• Language: English
• ISBN 10: 0893917818
• ISBN 13: 9780893917814
• Binding: Hardcover
• Condition: New

About this title

Synopsis

VLSI systems are becoming very complex and difficult to test. Traditional stuck-at fault problems may be inadequate to model possible manufacturing defects in the integrated ciruit. Hierarchial models are needed that are easy to use at the transistor and functional levels. Stuck-open faults present severe testing problems in CMOS circuits, to overcome testing problems testable designs are utilized. Bridging faults are important due to the shrinking geometry of ICs. BIST PLA schemes have common features-controllability and observability - which are enhanced through additional logic and test points. Certain circuit topologies are more easily testable than others. The amount of reconvergent fan-out is a critical factor in determining realistic measures for determining test generation difficulty. Test implementation is usually left until after the VLSI data path has been synthesized into a structural description. This leads to investigation methodologies for performing design synthesis with test incorporation. These topics and more are discussed.

About the Author

brist /f George /i W.