Wireless Network System in VLSI System Design : Secured Routing Protocol Technique

Language: English

Published by LAP LAMBERT Academic Publishing, 2020

6200587906 / 9786200587909

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nach der Bestellung gedruckt Neuware - Printed after ordering - NoC built with reconfigurable routers allows the use of buffer switch smaller depths. These in turn have a similar performance with respect to NoC using a fixed size router, showing a large buffer depth and high-power dissipation. Analyses the reconfigurable router for low power and high performance with NoC architecture. Therefore the models are based on Network on a Chip (NoC) router is used to increase the reliability by avoiding errors and cross talk between the routers. By using swapping router can avoid deadlock conflicts and integrates dynamic arbiter to increase QoS (Quality of Service).The following objectives are Analysing the area, speed and power relation among them. Develop a utility that will go through all the implementation and come up with one having minimum power, efficient area and high speed. Research work is targeted mainly on implementing a simple and more adaptive VLSI architecture on NoC based system design.In enhance the security level on routing based methodology, the second part of the research work is on IBAAGKA (Identity-Based Authenticated Asymmetric Group Key Agreement) protocol for secured group communication by implementing FIFO ROUTING TECHNIQUE.

Seller Inventory # 9786200587909

Title
Wireless Network System in VLSI System Design : Secured Routing Protocol Technique
Author
Thamarai Selvan
Publisher
LAP LAMBERT Academic Publishing
Publication year
2020
Condition
Neu
Binding
Taschenbuch
Language
English
ISBN 10
6200587906
ISBN 13
9786200587909
Item weight
244 grams
Dimensions
220x150x10 mm

AHA-BUCH GmbH

Einbeck, Germany

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