Writing Testbenches using SystemVerilog

Bergeron, Janick

ISBN 10: 0387292217 / ISBN 13: 9780387292212

Published by Springer, 2006

About this Item

The item is fairly worn but still readable. The book may have some cosmetic wear (i.e. creased spine/cover, scratches, curled corners, folded pages, sunburn, stains, water damage, bent, torn, damaged binding, dent). - The dust jacket if present, may be marked, and have considerable heavy wear. - The book might be ex-library copy, and may have the markings and stickers associated from the library - The book may have considerable highlights/notes/underlined pages but the text is legible - Accessories such as CD, codes, toys, may not be included - Safe and Secure Mailer - No Hassle Return. Seller Inventory # 521YH0000L24

Bibliographic Details

Title: Writing Testbenches using SystemVerilog

Publisher: Springer

Publication Date: 2006

Binding: Hardcover

Condition: Acceptable

About this title

Synopsis:

If you survey hardware design groups, you will learn that between 60% and 80% of their effort is dedicated to verification. This may seem unusually large, but I include in "verification" all debugging and correctness checking activities, not just writing and running testbenches. Every time a hardware designer pulls up a waveform viewer, he or she performs a verification task. With today’s ASIC and FPGA sizes and geometries, getting a...

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