I received my MS and PhD degrees from University of Bologna (Italy) in 1999 and 2002, respectively. I joined the Engineering Department of University of Ferrara in 2004, where I currently hold an assistant professor position and I lead the research group on Multi-Processor Systems-on-Chip. My main expertise is on multi-core digital integrated systems, with emphasis on all aspects of system interconnect design (from design technology to physical design issues through architecture design techniques). I have been visiting researcher at international academic institutions (Stanford University) and semiconductor companies (STMicroelectronics, NEC America, Samsung, NXP Semiconductors). I have been program chair of the main events of the network-on-chip community (Int. Symp. on Networks-on-Chip, Design Automation and Test in Europe Conference - Network-on-Chip track, NoC tutorial and workshop at Hipeac 2010) and I am currently general chair of the INA-OCMC workshop. I am member of the editorial board for the IET Computer and Digital Techniques Journal. I am involved in two EU-funded projects within the FP7 program (Galaxy, on GALS networks-on-chip, and NaNoC, on a NoC design platform) and I am an Hipeac member. Recently, my research group was funded by the Italian Government under the "Future in Research" program to advance research on photonic interconnection networks.