Alexander Barkalov
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Logic Synthesis for VLSI-Based Combined Finite State Machines: Synthesis Targeting ASICs, CPLDs and FPGAs (Lecture Notes in Electrical Engineering, 922)
Barkalov, Alexander; Titarenko, Larysa; Mielcarek, Kamil; Mazurkiewicz, Małgorzata; Kawecka, Elżbieta
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Logic Synthesis for FSM-Based Control Units (Lecture Notes in Electrical Engineering, 53)
Barkalov
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