Implementation Fdct Algorithm Using by Samaddar Swapan (5 results)
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Taschenbuch. Condition: Neu. Implementation of FDCT Algorithm Using Distributed Arithmetic | Swapan Kumar Samaddar (u. a.) | Taschenbuch | 136 S. | Englisch | 2013 | LAP LAMBERT Academic Publishing | EAN 9783659377815 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]…de | Anbieter: preigu.
Implementation of FDCT Algorithm Using Distributed Arithmetic
Samaddar, Swapan Kumar, Chowdhury, Debashis, Sinha, Amitabha
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Language: English
Published by LAP LAMBERT Academic Publishing Mai 2013, 2013
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector an…d constant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved. 136 pp. Englisch.
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Samaddar Swapan KumarSwapan Kumar Samaddar is a Senior Associate in Genpact India, Kolkata. He did BTech (CSE) from Netaji Subhash Engineering College, Kolkata and later on did his ME (CSE) from West Be…ngal University of Technology, .
Language: English
Published by LAP LAMBERT Academic Publishing Mai 2013, 2013
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Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The paper describes a new architecture for implementation of 8 X 8 FDCT (Fast Discrete Cosine Transform) using Distributed Arithmetic (DA). This proposed architecture combines both DA based approaches for distributed input vector and co…nstant coefficients. The described Combined Distributed Arithmetic based DCT (CDA-DCT) architecture has been implemented on Virtex II FPGA, and shows fewer adders and saving exceeding 97% achieved.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 136 pp. Englisch.
