Design Methodology for RF CMOS Phase Locked Loops

Engineers face stiff challenges in designing phase-locked loop (PLL) circuits for wireless communications thanks to phase noise and other obstacles. This practical book comes to the rescue with a proven PLL design and optimization methodology that lets designers assess their options, predict PLL behavior, and develop cost-effective PLLs that meet performance requirements no matter what IC (integrated circuit) challenges they come up against. This uniquely comprehensive toolkit takes designers step-by-step through operation principles, design procedures, phase noise analysis, layout considerations, and Cmos realizations for each PLL building block. It provides a sample design of a fully integrated PLL for Wlan applications, demonstrating every step from specs definition and circuit characterization to layout generation and circuit schematics.

Guillermo Bistué is a researcher at The Centro de Estudios e Investigaciones Técnicas de Gipuzkoa (CEIT) in Navarro, Spain. He received his M.Sc. and Ph.D. degrees from the Engineering School of the University of Navarra. He has taken part in several industrial and basic research projects, dealing with wireless standards communications like WLAN, DVB-H, GALILEO&GPS. He is author or coauthor of more than twenty technical publications.

Íñigo Adin is a researcher at The Centro de Estudios e Investigaciones Técnicas de Gipuzkoa (CEIT) in Navarro, Spain. He received his M.Sc. in Electronics Engineering and his Ph.D. at the University of Navarra. From 2003 to 2007 he worked towards his Ph.D. focused on CMOS RF front-ends for multistandard wireless applications in the 5GHz U-NII band. Other fields of interest have been the ESD protection design of a low power front end for EPSON.

Carlos Quemada is a researcher with IKERLAN, Mondragon, Spain. He has published several papers in the field of CMOS technology and previously was a member of the Engineering Faculty at the University of Navarra. He earned his M.Sc. in telecommunications engineering and his Ph.D. in industrial engineering, both at the University of Navarra.