Silicon technology continues to progress, but device scaling is rapidly taking the metal oxide semiconductor field-effect transistor (MOSFET) to its limit. When MOS technology was developed in the 1960's, channel lengths were about 10 micrometers, but researchers are now building transistors with channel lengths of less than 10 nanometers. New kinds of transistors and other devices are also being explored. Nanoscale MOSFET engineering continues, however, to be dominated by concepts and approaches originally developed to treat microscale devices. To push MOSFETs to their limits and to explore devices that may complement or even supplant them, a clear understanding of device physics at the nano/molecular scale will be essential. Our objective is to provide engineers and scientists with that understandin- not only of nano-devices, but also of the considerations that ultimately determine system performance. It is likely that nanoelectronics will involve much more than making smaller and different transistors, but nanoscale transistors provides a specific, clear context in which to address some broad issues and is, therefore, our focus in this monograph.
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Mark S. Lundstrom is the Scifres Distinguished Professor of Electrical and Computer Engineering at Purdue University where he also directs the NSF Network for Computational Nanotechnology. His current research interests center on the physics of semiconductor devices, especially nanoscale transistors. His previous work includes studies of heterostructure devices, solar cells, heterojunction bipolar transistors and semiconductor lasers. During the course of his Purdue career, Lundstrom has served as director of the Optoelectronics Research Center and assistant dean of the Schools of Engineering. He is a fellow of both the Institute of Electrical and Electronic Engineers (IEEE) and the American Physical Society and the recipient of several awards for teaching and research ― most recently the 2002 IEEE Cledo Brunetti Award and the 2002 Semiconductor Research Corporation Technical Achievement Award for his work with his colleague, S. Datta, on nanoscale electronics.
Jing Guo is an assistant professor of Electrical and Computer Engineering at University of Florida, Gainesville. His has worked on the theory, modeling and simulation of a variety of nanotransistors, including silicon nanotransistors, carbon nanotube transistors, and single electron transistors, in close collaboration with experimentalists. His current research interests focus on modeling and simulation of nanoscale devices, carbon nanotube electronics and optoelectronics, quantum transport, physics of nanoscale transistors, and parallel computation.
NANOSCALE TRANSISTORS: Device Physics, Modeling and Simulation describes the recent development of theory, modeling, and simulation of nanotransistors for electrical engineers, physicists, and chemists working with nanoscale devices. Simple physical pictures and semi-analytical models, which were validated by detailed numerical simulations, are provided for both evolutionary and revolutionary nanotransistors. Chapter 1 reviews some basic concepts, and Chapter 2 summarizes the essentials of traditional semiconductor devices, digital circuits, and systems. This material provides a baseline against which new devices can be assessed. Chapters 3 and 4 present a non-traditional view of the MOSFET using concepts that are valid at nanoscale. Chapter 5 applies the same concepts to nanotube FET as an example of how to extend the concepts to revolutionary nanotransistors. Chapter 6 explores the limits of devices by discussing conduction in single molecules.
The book is a useful reference for senior-level or graduate-level courses on nanoelectronics, modeling and simulation. It is also valuable to scientists and engineers who are pushing MOSFETs to their limits and developing revolutionary nanoscale devices.
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Hardcover. Condition: new. Hardcover. Silicon technology continues to progress, but device scaling is rapidly taking the metal oxide semiconductor field-effect transistor (MOSFET) to its limit. When MOS technology was developed in the 1960's, channel lengths were about 10 micrometers, but researchers are now building transistors with channel lengths of less than 10 nanometers. New kinds of transistors and other devices are also being explored. Nanoscale MOSFET engineering continues, however, to be dominated by concepts and approaches originally developed to treat microscale devices. To push MOSFETs to their limits and to explore devices that may complement or even supplant them, a clear understanding of device physics at the nano/molecular scale will be essential. Our objective is to provide engineers and scientists with that understandin- not only of nano-devices, but also of the considerations that ultimately determine system performance. It is likely that nanoelectronics will involve much more than making smaller and different transistors, but nanoscale transistors provides a specific, clear context in which to address some broad issues and is, therefore, our focus in this monograph. Silicon technology continues to progress, but device scaling is rapidly taking the metal oxide semiconductor field-effect transistor (MOSFET) to its limit. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Seller Inventory # 9780387280028
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