Software-based cryptography can be used for security applications where data traffic is not too large and low encryption rate is tolerable. But hardware methods are more suitable where speed and real-time encryption are needed. Until now, there has been no book explaining how cryptographic algorithms can be implemented on reconfigurable hardware devices. This book covers computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The author emphasizes the practical aspects of reconfigurable hardware design, explaining the basic mathematics involved, and giving a comprehensive description of state-of-the-art implementation techniques.
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This book covers the study of computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The concepts and techniques reviewed in this book will make special emphasis on the practical aspects of reconfigurable hardware design, explaining the basic mathematics related and giving a comprehensive description of state-of-the-art implementation techniques. The authors show how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices without posing prohibited high requirements for hardware resources. The material in this book will be of interest to engineering professionals, programmers, hardware designers, and graduate students interested in the development of security and cryptographic mechanisms at a beginning/intermediate level.
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Book Description Condition: New. Hardware methods are more suitable where high speed and real-time encryption are needed. This monograph shows how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices such as Field Programmable Gate Arrays (FPGAs) without posing prohibitively high requirements for hardware resources. Series: Signals and Communication Technology. Num Pages: 362 pages, biography. BIC Classification: THR; UKP; UT. Category: (P) Professional & Vocational. Dimension: 233 x 155 x 22. Weight in Grams: 1600. . 2006. Hardback. . . . . Seller Inventory # V9780387338835
Book Description Gebunden. Condition: New. Presents a comprehensive methodology for efficient implementation of cryptographic algorithms on reconfigurable hardware devicesSpecial emphasis on the practical aspects of reconfigurable hardware design and a comprehensive description of state-of. Seller Inventory # 5910082
Book Description Condition: New. Hardware methods are more suitable where high speed and real-time encryption are needed. This monograph shows how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices such as Field Programmable Gate Arrays (FPGAs) without posing prohibitively high requirements for hardware resources. Series: Signals and Communication Technology. Num Pages: 362 pages, biography. BIC Classification: THR; UKP; UT. Category: (P) Professional & Vocational. Dimension: 233 x 155 x 22. Weight in Grams: 1600. . 2006. Hardback. . . . . Books ship from the US and Ireland. Seller Inventory # V9780387338835
Book Description Buch. Condition: Neu. Neuware - Cryptographic solutions using software methods can be used for those security applications where data traffic is not too large and low encryption rate is tolerable. On the other hand, hardware methods offer high-speed solutions making them highly suitable for applications where data traffic is fast and large data is required to be encrypted in real time. VLSI (also known as ASIC), and FPGAs (Field Programmable Gate Arrays) are two alternatives for implementing cryptographic algorithms in hardware. FPGAs offer several benefits for cryptographic algorithm implementations over VLSI as they offer high flexibility. Due to its reconfigurable property, keys can be changed rapidly. Moreover, basic primitives in most cryptographic algorithms can efficiently be implemented in FPGAs.Since the invention of the Data Encryption Standard (DES), some 40 years ago, a considerable amount of cryptographic algorithm implementation literature has been produced both, for software and hardware platforms. Unfortunately, virtually there exists no book explaining how the main cryptographic algorithms can be implemented on reconfigurable hardware devices.This book will cover the study of computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The concepts and techniques to be reviewed in this book will make special emphasis on the practical aspects of reconfigurable hardware design, explaining the basic mathematics related and giving a comprehensive description of state-of-the-art implementation techniques. Thus, the main goal of this monograph is to show how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices without posing prohibited high requirements for hardware resources. Seller Inventory # 9780387338835