Software-based cryptography can be used for security applications where data traffic is not too large and low encryption rate is tolerable. But hardware methods are more suitable where speed and real-time encryption are needed. Until now, there has been no book explaining how cryptographic algorithms can be implemented on reconfigurable hardware devices. This book covers computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The author emphasizes the practical aspects of reconfigurable hardware design, explaining the basic mathematics involved, and giving a comprehensive description of state-of-the-art implementation techniques.
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This book covers the study of computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The concepts and techniques reviewed in this book will make special emphasis on the practical aspects of reconfigurable hardware design, explaining the basic mathematics related and giving a comprehensive description of state-of-the-art implementation techniques. The authors show how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices without posing prohibited high requirements for hardware resources. The material in this book will be of interest to engineering professionals, programmers, hardware designers, and graduate students interested in the development of security and cryptographic mechanisms at a beginning/intermediate level.
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