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Synopsis
Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems.
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques is described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization.
Timing Analysis and Optimization of Sequential Circuits covers the following topics:
- Algorithms for sequential timing analysis
- Fast algorithms for clock skew optimization and their applications
- Efficient techniques for retiming large sequential circuits
- Coupling sequential and combinational optimizations.
Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design.
"synopsis" may belong to another edition of this title.
Review
'To sum it up it can be said that the authors have done a great job. The book is well written and can serve as a textbook for graduate students, researchers, and professionals in the area of CAD for VLSI and VLSI circuit design.'
Zentral Blatt Mathematik, 987 (2002)
"About this title" may belong to another edition of this title.
- PublisherSpringer
- Publication date1998
- ISBN 10 0792383214
- ISBN 13 9780792383215
- BindingHardcover
- LanguageEnglish
- Number of pages205
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Timing Analysis and Optimization of Sequential Circuits
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Timing Analysis and Optimization of Sequential Circuits
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Timing Analysis and Optimization of Sequential Circuits
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Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems. Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques is described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits covers the following topics: Algorithms for sequential timing analysis Fast algorithms for clock skew optimization and their applications Efficient techniques for retiming large sequential circuits Coupling sequential and combinational optimizations. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design. 212 pp. Englisch. Seller Inventory # 9780792383215
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Timing Analysis and Optimization of Sequential Circuits
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Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic. Seller Inventory # 5970834
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