Items related to Reuse Methodology Manual for System-on-a-Chip Designs
Synopsis
Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology not only promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the huge numbers of gates now available.
These designers...
From the Back Cover
Features of the Third Edition:
- UP TO DATE
- STATE OF THE ART
- REUSE AS A SOLUTION FOR CIRCUIT DESIGNERS
- A CHRONICLE OF "BEST PRACTICES"
- ALL CHAPTERS UPDATED AND REVISED
- GENERIC GUIDELINES-NON TOOL SPECIFIC
- EMPHASIS ON HARD IP AND PHYSICAL DESIGN
Reuse Methodology Manual for System-on-a-Chip Designs, Third Edition outlines a set of best practices for creating reusable designs for use in a SoC design methodology. These...
"About this title" may belong to another edition of this title.
- PublisherSpringer
- Publication date1999
- ISBN 10 0792385586
- ISBN 13 9780792385585
- BindingHardcover
- LanguageEnglish
- Edition number2
- Number of pages312
- Rating
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Reuse Methodology Manual for System-On-A-Chip Designs
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ISBN 13: 9780792385585
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Reuse Methodology Manual for System-on-a-Chip Designs
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ISBN 10: 0792385586
ISBN 13: 9780792385585
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