Synopsis
Second edition describes more features, has expanded test bench modeling section, more examples explaining constructs and has exercises to every chapter.
"synopsis" may belong to another edition of this title.
About the Author
J. Bhasker is a Distinguished Member of Technical Staff at Bell Laboratories at Lucent Technologies. He has taught VHDL and Verilog HDL courses at Lucent Technologies for more than four years. He has also authored four other books in hardware description languages and synthesis including the best-selling books "A VHDL Primer" and "A VHDL Synthesis Primer". Bhasker has a PhD in Computer Science from the University of Minnesota, M.Tech. in Computer Technology and a B.Tech. in Electrical Enginering from the Indian Institute of Technology, New Delhi.
From the Back Cover
With this book, you can:
- Learn Verilog HDL the fast and easy way.
- Obtain a thorough understanding of the basic building blocks of Verilog HDL.
- Find out how to model hardware.
- Find out how to test the hardware model using a test bench.
"About this title" may belong to another edition of this title.
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