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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard (Frontiers in Electronic Testing, 22B) - Hardcover
Synopsis
Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density.
Power-Constrained Testing of VLSI Circuits focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.
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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard (Frontiers in Electronic Testing) Nicolici, Nicola and Al-Hashimi, Bashir M.
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Power-Constrained Testing of VLSI Circuits (Frontiers in Electronic Testing)
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Condition: Good. 178 pp., Hardcover, ex library else text clean and binding tight. - If you are reading this, this item is actually (physically) in our stock and ready for shipment once ordered. We are not bookjackers. Buyer is responsible for any additional duties, taxes, or fees required by recipient's country. Seller Inventory # ZB1126153
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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard (Frontiers in Electronic Testing, 22B)
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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard (Frontiers in Electronic Testing, 22B)
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Power-Constrained Testing of VLSI Circuits
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Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for redu. Seller Inventory # 4094936
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Power-constrained Testing of Vlsi Circuits
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Kluwer Academic Publishers, 2003
ISBN 10: 140207235X
ISBN 13: 9781402072352
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Condition: New. Focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. This text surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths. Series: Frontiers in Electronic Testing. Num Pages: 189 pages, biography. BIC Classification: TJFD. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 297 x 210 x 12. Weight in Grams: 990. . 2003. Hardback. . . . . Seller Inventory # V9781402072352
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Power-Constrained Testing of VLSI Circuits: A Guide to the IEEE 1149.4 Test Standard
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Power-Constrained Testing of VLSI Circuits | A Guide to the IEEE 1149.4 Test Standard
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Buch. Condition: Neu. Power-Constrained Testing of VLSI Circuits | A Guide to the IEEE 1149.4 Test Standard | Bashir M. Al-Hashimi (u. a.) | Buch | xi | Englisch | 2003 | Springer US | EAN 9781402072352 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand. Seller Inventory # 102573476
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Power-constrained Testing of Vlsi Circuits
Published by
Kluwer Academic Publishers, 2003
ISBN 10: 140207235X
ISBN 13: 9781402072352
New
Hardcover
Seller: Kennys Bookstore, Olney, MD, U.S.A.
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Condition: New. Focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. This text surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths. Series: Frontiers in Electronic Testing. Num Pages: 189 pages, biography. BIC Classification: TJFD. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly; (UU) Undergraduate. Dimension: 297 x 210 x 12. Weight in Grams: 990. . 2003. Hardback. . . . . Books ship from the US and Ireland. Seller Inventory # V9781402072352
Quantity: 15 available
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Power-Constrained Testing of VLSI Circuits
Published by
Springer US, Springer US Feb 2003, 2003
ISBN 10: 140207235X
ISBN 13: 9781402072352
New
Hardcover
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
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Buch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power dissipation can decrease the reliability of the circuit under test due to higher temperature and current density.Power-Constrained Testing of VLSI Circuits focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. The first part of this book surveys the existing techniques for power constrained testing of VLSI circuits. In the second part, several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths are presented.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 192 pp. Englisch. Seller Inventory # 9781402072352
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