Multi-Threshold CMOS Digital Circuits Managing Leakage Power discusses the Multi-threshold voltage CMOS (MTCMOS) technology, that has emerged as an increasingly popular technique to control the escalating leakage power, while maintaining high performance. The book addresses the leakage problem in a number of designs for combinational, sequential, dynamic, and current-steering logic. Moreover, computer-aided design methodologies for designing low-leakage integrated circuits are presented. The book give an excellent survey of state-of-the-art techniques presented in the literature as well as proposed designs that minimize leakage power, while achieving high-performance.
Multi-Threshold CMOS Digital Circuits Managing Leakage Power is written for students of VLSI design as well as practicing circuit designers, system designers, CAD tool developers and researchers. It assumes a basic knowledge of digital circuit design and device operation, and covers a broad range of circuit design techniques.
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"This book is written for students of VLSI design and practicing circuit designers and shows how the MTCMOS technology can be used to reduce power dissipation. ... The text covers a wide range of circuit design techniques. ... Each chapter contains a brief introduction that serves as a quick background, summary that explains the contributions contained therein, and a set of additional references provided for further reading." (A. V. Chashkin, Zentralblatt MATH, Vol. 1041 (16), 2004)
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Hardcover. Condition: new. Hardcover. Multi-Threshold CMOS Digital Circuits Managing Leakage Power discusses the Multi-threshold voltage CMOS (MTCMOS) technology, that has emerged as an increasingly popular technique to control the escalating leakage power, while maintaining high performance. The book addresses the leakage problem in a number of designs for combinational, sequential, dynamic, and current-steering logic. Moreover, computer-aided design methodologies for designing low-leakage integrated circuits are presented. The book give an excellent survey of state-of-the-art techniques presented in the literature as well as proposed designs that minimize leakage power, while achieving high-performance. Multi-Threshold CMOS Digital Circuits Managing Leakage Power is written for students of VLSI design as well as practicing circuit designers, system designers, CAD tool developers and researchers. It assumes a basic knowledge of digital circuit design and device operation, and covers a broad range of circuit design techniques. Multi-Threshold CMOS Digital Circuits Managing Leakage Power is written for students of VLSI design as well as practicing circuit designers, system designers, CAD tool developers and researchers. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Seller Inventory # 9781402075292
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Condition: New. Discusses the Multi-threshold voltage CMOS (MTCMOS) technology, that has emerged as a popular technique to control the escalating leakage power, while maintaining high performance. This book addresses the leakage problem in a number of designs for combinational, sequential, dynamic, and current-steering logic. Num Pages: 216 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 235 x 155 x 14. Weight in Grams: 536. . 2003. Illustrated ed. Hardback. . . . . Seller Inventory # V9781402075292
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