SystemVerilog For Design: A Guide to Using SystemVerilog for Hardware Design and Modeling - Hardcover

Sutherland, Stuart; Davidmann, Simon; Flake, Peter

  • 3.94 out of 5 stars
    17 ratings by Goodreads
 
Image Not Available

Synopsis

SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs.

This book, SystemVerilog for Design, addresses the first aspect of the SystemVerilog extensions to Verilog. Important modeling features are...

Review

"The development of the SystemVerilog language makes it easier to produce more efficient and concise descriptions of complex hardware designs. The authors of this book have been involved with the development of the language from the beginning, and who is better to learn from than those involved from day one?"
(Greg Spirakis, Vice President of Design Technology, Intel Corporation)
"As a company committed to `open standards', and as one of...

"About this title" may belong to another edition of this title.

  • PublisherSpringer
  • Publication date2003
  • ISBN 10 1402075308
  • ISBN 13 9781402075308
  • BindingHardcover
  • LanguageEnglish
  • Edition number1
  • Number of pages402
  • Rating
    • 3.94 out of 5 stars
      17 ratings by Goodreads