Items related to Wafer-Level Integrated Systems: Implementation Issues...
Wafer-Level Integrated Systems: Implementation Issues (The Springer International Series in Engineering and Computer Science) - Softcover
Synopsis
From the perspective of complex systems, conventional Ie's can be regarded as "discrete" devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term "wafer level" is perhaps more appropriate than "wafer-scale". A "wafer-level" monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, "wafer-scale" merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.
"synopsis" may belong to another edition of this title.
- PublisherSpringer
- Publication date2012
- ISBN 10 1461288983
- ISBN 13 9781461288985
- BindingPaperback
- LanguageEnglish
- Number of pages472
Other Popular Editions of the Same Title
Search results for Wafer-Level Integrated Systems: Implementation Issues...
Stock Image
Wafer-Level Integrated Systems: Implementation Issues (The Springer International Series in Engineering and Computer Science)
Seller: Lucky's Textbooks, Dallas, TX, U.S.A.
Seller rating 5 out of 5 stars
Condition: New. Seller Inventory # ABLIING23Mar2716030030114
Quantity: Over 20 available
Stock Image
Wafer-Level Integrated Systems: Implementation Issues (The Springer International Series in Engineering and Computer Science)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
Condition: New. In. Seller Inventory # ria9781461288985_new
Quantity: Over 20 available
Seller Image
Wafer-Level Integrated Systems : Implementation Issues
Seller: AHA-BUCH GmbH, Einbeck, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit. Seller Inventory # 9781461288985
Quantity: 1 available
Seller Image
Wafer-Level Integrated Systems
Print on DemandSeller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit. 476 pp. Englisch. Seller Inventory # 9781461288985
Quantity: 2 available
Stock Image
Wafer-Level Integrated Systems: Implementation Issues (The Springer International Series in Engineering and Computer Science, 70)
Seller: Mispah books, Redhill, SURRE, United Kingdom
Seller rating 4 out of 5 stars
Paperback. Condition: Like New. Like New. book. Seller Inventory # ERICA80014612889836
Quantity: 1 available