Guest Editorial; L.O. Chua, et al. A 16 × 16 Cellular Neural Network Universal Chip: The First Complete Single-Chip Dynamic Computer Array with Distributed Memory and with Gray-Scale Input-Output; J.M. Cruz, L. Chua. A 6 × 6 Cells Interconnection-Oriented Programmable Chip for CNN: M. Salerno, et al. Analog VLSI Design Constraints of Programmable Cellular Neural Networks; P. Kinget, M. Steyaert. Focal-Plane and Multiple Chip VLSI Approaches to CNNs; M. Anguita, et al. Architecture and Design of 1-D Enhanced Cellular Neural Network Processors for Signal Detection; M.Y. Wang, et al. Analog VLSI Circuits for Competitive Learning Networks; H.C. Card, et al. Design of Neural Networks Based on Wave-Parallel Computing Technique; Y. Yuminaka, et al.
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