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Entropy Coders of the H.264/AVC Standard: Algorithms and VLSI Architectures (Signals and Communication Technology) - Softcover

 
9783642265709: Entropy Coders of the H.264/AVC Standard: Algorithms and VLSI Architectures (Signals and Communication Technology)

Synopsis

This book presents an Entropy Encoder for the H.264 or MPEG-4 standard, starting with the fundamentals and a review on existing code design. It opens a way to impressive compression performance and new multimedia applications.

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From the Back Cover

This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of one, two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analysis to software/ hardware co-simulation. A typical design of the Context-based Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface.

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  • PublisherSpringer
  • Publication date2012
  • ISBN 10 3642265707
  • ISBN 13 9783642265709
  • BindingPaperback
  • LanguageEnglish
  • Number of pages204

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9783642147029: Entropy Coders of the H.264/AVC Standard: Algorithms and VLSI Architectures (Signals and Communication Technology)

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ISBN 10:  364214702X ISBN 13:  9783642147029
Publisher: Springer, 2010
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of one, two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analysis to software/ hardware co-simulation. A typical design of the Context-based Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface. 204 pp. Englisch. Seller Inventory # 9783642265709

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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Opens a way to impressive compression performance and a new multimedia applicationsPresents the Design and Architecture of a Context Adaptive Binary Arithmetic Coding(CABAC) Encoder &nbsp&nbspThis book prese. Seller Inventory # 5054626

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Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book presents a collection of algorithms and VLSI architectures of entropy (or statistical) codecs of recent video compression standards, with focus on the H.264/AVC standard. For any visual data compression scheme, there exists a combination of one, two, or all of the following three stages: spatial, temporal, and statistical compression. General readers are first introduced with the various algorithms of the statistical coders. The VLSI implementations are also reviewed and discussed. Readers with limited hardware design background are also introduced with a design methodology starting from performance-complexity analysis to software/ hardware co-simulation. A typical design of the Context-based Adaptive Binary Arithmetic Coding (CABAC) encoder is also presented in details. To support System-on-Chip design environment, the CABAC design is wrapped with a SoC-based Wishbone system bus interface. Seller Inventory # 9783642265709

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