Items related to Guide to RISC Processors for Programmers and Engineers
Synopsis
Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Examples RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel's 64 bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here. Features and Benefits: Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience Presents material in a manner suitable for flexible self-study Assembly language programs can be executed on a PC using the SPIM simulator Integrates core concepts to processor designs and their implementations Supplies extensive and complete programming examples and figures Contains chapter-by-chapter overviews and summaries Provides source code for the MIPS language at the book?s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practic
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