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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Lecture Notes in Electrical Engineering, 184) - Softcover
Synopsis
Presenting a mathematical model for on-chip routers which can be used for NoC performance analysis, this book reflects the shift from computation- to communication-based design that has resulted from the increasing complexity of so-called ‘systems-on-chip’.
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From the Back Cover
Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.
This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.
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- PublisherSpringer
- Publication date2015
- ISBN 10 9400798652
- ISBN 13 9789400798656
- BindingPaperback
- LanguageEnglish
- Number of pages188
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Lecture Notes in Electrical Engineering, 184)
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
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Springer Netherlands Apr 2015, 2015
ISBN 10: 9400798652
ISBN 13: 9789400798656
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs. 188 pp. Englisch. Seller Inventory # 9789400798656
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
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ISBN 10: 9400798652
ISBN 13: 9789400798656
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Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs. Seller Inventory # 9789400798656
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Presented is a mathematical model for on-chip routers and use this model for NoC performance analysisOur performance analysis approach can be used not only to obtain fast and accurate performance estimates, but also to guide the NoC design process. Seller Inventory # 21974337
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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (Lecture Notes in Electrical Engineering, 184)
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