Analysis and Design of Networks-on-Chip Under High Process Variation

Language: English

Published by Springer International Publishing Dez 2015, 2015

3319257641 / 9783319257648

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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.

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This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns. 164 pp. Englisch.

Seller Inventory # 9783319257648

Title
Analysis and Design of Networks-on-Chip Under High Process Variation
Author
Rabab Ezz-Eldin
Publisher
Springer International Publishing Dez 2015
Publication year
2015
Condition
Neu
Binding
Buch
Language
English
ISBN 10
3319257641
ISBN 13
9783319257648
Item weight
418 grams
Dimensions
241x160x15 mm

BuchWeltWeit Ludwig Meier e.K.

Bergisch Gladbach, Germany

5-star seller

AbeBooks seller since January 11, 2012

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BuchWeltWeit Ludwig Meier e.K.

Germany