Debugging Systems-on-Chip. Communication-centric and Abstraction-based Techniques.

Vermeulen, Bart; Goossens, Kees

ISBN 10: 3319062417 / ISBN 13: 9783319062419

Published by Cham, Springer International Publishing., 2014

About this Item

ed. 2014. 235 mm x 155 mm. XV, 311 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped. Stamped. Slightly cover imperfections. Embedded Systems. Sprache: Englisch.

Seller Inventory # 31793AB

Bibliographic Details

• Title: Debugging Systems-on-Chip. Communication-centric and Abstraction-based Techniques.
• Publisher: Cham, Springer International Publishing.
• Publication Date: 2014
• Language: English
• ISBN 10: 3319062417
• ISBN 13: 9783319062419
• Binding: Hardcover
• Seller catalogs:
  • Technik

About this title

Synopsis

This book describes an approach and supporting infrastructure to facilitate debugging the silicon implementation of a System-on-Chip (SOC), allowing its associated product to be introduced into the market more quickly. Readers learn step-by-step the key requirements for debugging a modern, silicon SOC implementation, nine factors that complicate this debugging task, and a new debug approach that addresses these requirements and complicating factors. The authors’ novel communication-centric, scan-based, abstraction-based, run/stop-based (CSAR) debug approach is discussed in detail, showing how it helps to meet debug requirements and address the nine, previously identified factors that complicate debugging silicon implementations of SOCs. The authors also derive the debug infrastructure requirements to support debugging of a silicon implementation of an SOC with their CSAR debug approach. This debug infrastructure consists of a generic on-chip debug architecture, a configurable automated design-for-debug flow to be used during the design of an SOC, and customizable off-chip debugger software. Coverage includes an evaluation of the efficiency and effectiveness of the CSAR approach and its supporting infrastructure, using six industrial SOCs and an illustrative, example SOC model. The authors also quantify the hardware cost and design effort to support their approach.
 

About the Author

Bart Vermeulen received his MSc and PhD degrees in Electrical Engineering from the Eindhoven University of Technology in respectively 1997 and 2013. He is currently a Senior Principal in the Central Research and Development organization of NXP Semiconductors, The Netherlands. His research interests include the design, validation and test of robust, distributed architectures for embedded systems. He published 40+ papers and 8 patents.

Kees Goossens received his PhD in Computer Science from the University of Edinburgh in 1993 on hardware verification using embeddings of formal semantics of hardware description languages in proof systems. He worked for Philips/NXP Research from 1995 to 2010 on networks on chip for consumer electronics. He is professor at the Eindhoven University of Technology, where his research focusses on composable, predictable, low-power embedded systems. He published 2 books, 100+ papers and 24 patents.