Low Power Asynchronous Logic design for Viterbi Decoders

Language: English

Published by LAP LAMBERT Academic Publishing, 2018

6139851297 / 9786139851294

  • Softcover
  • New
See all details

Seller: moluna, Greven, Germanymoluna

5-star seller

AbeBooks seller since July 9, 2020

View this seller's items
Softcover

Condition: New

US$ 41.02

US$ 56.96 shipping 
Ships from Germany to U.S.A.

Quantity: Over 20 available

Add to basket
Free 30-day returns

Item description from seller

Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Sakthivel T. Kalavathi DeviDr T. Kalavathi Devi completed her UG and PG in GCT, Coimbatore. Her areas of interest include VLSI Design, low power circuits, electronics system design. She has published papers in reputed journals and in.

Seller Inventory # 385874302

Title
Low Power Asynchronous Logic design for Viterbi Decoders
Author
T. Kalavathi Devi Sakthivel|Sakthivel Palaniappan
Publisher
LAP LAMBERT Academic Publishing
Publication year
2018
Condition
New
Binding
Soft cover
Language
English
ISBN 10
6139851297
ISBN 13
9786139851294
Dimensions
0.4 x 22 x 15

moluna

Greven, Germany

5-star seller

AbeBooks seller since July 9, 2020

Shipping rates from Germany to U.S.A.

Item16 to 45 business days16 to 45 business days
First itemUS$ 56.96US$ 56.96
Delivery times are set by sellers and vary by carrier and location. Orders passing through Customs may face delays and buyers are responsible for any associated duties or fees. Sellers may contact you regarding additional charges to cover any increased costs to ship your items.

Payment methods

  • Visa
  • Mastercard
  • American Express
  • Apple Pay
  • Google Pay
  • Bank Wire Transfer
  • Check
  • Paypal

Store description

Online Handel nur mit Neubüchern

Seller's business information

Moluna GmbH

Engberdingdamm 27
Greven, Germany 48268