Processor and System-on-chip Simulation

. Ed(s): Leupers, Rainer; Temam, Olivier

ISBN 10: 1441961747 / ISBN 13: 9781441961747

Published by Springer-Verlag New York Inc., 2010

This book reviews innovative technologies for simulation of computer architecture, presenting and discussing the principle technologies and current state of high-level hardware architecture simulation, both at the processor and the system-on-chip level. Editor(s): Leupers, Rainer; Temam, Olivier. Num Pages: 345 pages, biography. BIC Classification: TJFC; UGC. Category: (G) General (US: Trade). Dimension: 245 x 161 x 25. Weight in Grams: 660. . 2010. Hardback. . . . . Books ship from the US and Ireland. Seller Inventory # V9781441961747

Synopsis:

Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.

From the Back Cover: Processor and System-on-Chip Simulation Edited by: Rainer Leupers Olivier Temam The current trend from monolithic processors to multicore and multiprocessor systems on chips (MPSoC) with tens of cores and gigascale integration makes hardware architecture and software design more and more complex and costly. Therefore, simulation technology has become an extremely important pre-silicon verification and optimization vehicle. Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization, as well as functional and timing verification. Recent, innovative technologies, such as retargetable simulator generation, dynamic binary translation and sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. This book presents and discusses the principle technologies and state-of-the-art in high-level architecture software simulation, both at the processor and the system-on-chip level. • Presents state-of-the-art and future trends in processor and SoC simulation; • Demonstrates how simulation helps to boost hardware and software design productivity; • Addresses simulation requirements and technologies in the multicore context; • Covers system aspects, such as virtual platforms, bus simulation, caches, power, and design space exploration.

Bibliographic Details

Title: Processor and System-on-chip Simulation
Publisher: Springer-Verlag New York Inc.
Publication Date: 2010
Binding: Hardcover
Condition: New