VLSI Test Principles And Architectures: Design for Testability

Wang, Laung-terng (Editor)/ Wu, Cheng-Wen (Editor)/ Wen, Xiaoqing (Editor)

ISBN 10: 0123705975 / ISBN 13: 9780123705976

Published by Morgan Kaufmann Pub, 2006

About this Item

1st edition. 777 pages. 9.25x7.50x2.00 inches. In Stock.

Seller Inventory # __0123705975

Bibliographic Details

• Title: VLSI Test Principles And Architectures: Design for Testability
• Publisher: Morgan Kaufmann Pub
• Publication Date: 2006
• Language: English
• ISBN 10: 0123705975
• ISBN 13: 9780123705976
• Binding: Hardcover
• Condition: Brand New

About this title

Synopsis

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

• Most up-to-date coverage of design for testability.
• Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
• Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.

About the Authors

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.