This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

� Most up-to-date coverage of design for testability.
� Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
� Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
� Lecture slides and exercise solutions for all chapters are now available.
� Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.

About the Author:

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

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