A Verilog HDL Primer, Third Edition

Bhasker, J.

ISBN 10: 0965039161 / ISBN 13: 9780965039161

Published by Star Galaxy Publishing, 2005

About this Item

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Bibliographic Details

Title: A Verilog HDL Primer, Third Edition

Publisher: Star Galaxy Publishing

Publication Date: 2005

Binding: Hardcover

Condition: Good

Edition: 3rd Edition

About this title

Synopsis:

- Written for new users. - Explains the language through simple examples. - Explains the syntax of language using commonly-used design terminology. - Explains the behavioral style, the dataflow style, and structural style in detail. - Concepts of delay and timing are clearly explained. - Testbench writing is made easier by providing a number of examples. - Many hardware modeling examples have also been provided to make this an excellent reference.

Also includes exercises for every chapter and expanded coverage of more language features including test bench writing strategies.

Third edition is based on IEEE Verilog 2001 Standard. It includes explanations of all the new features introduced in this version of the language, with examples.

From the Back Cover:

With this book, you can:

- Learn Verilog HDL the fast and easy way. - Obtain a thorough understanding of the basic building blocks of Verilog HDL. - Find out how to model hardware. - Find out how to test the hardware model using a test bench.

"This text is a definitive learning resource for the student of Verilog as well as an excellent reference for the experienced designer. The features of Verilog are clearly covered with both explanations and examples. Especially beneficial is Appendix A which contains a syntax reference in alphabetical order" - Vincent Zeyak Jr., Agere Systems

"I have found the book easy to read, to the point, and an excellent reference" - Sharad Seth, University of Nebraska at Lincoln