Smart Integrated Circuit Design (32 results)
Published by IEEE; First Edition (January 1, 1994), 1994
- Hardcover
Seller: Tacoma Book Center, Tacoma, WA, U.S.A.Tacoma Book Center
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Hardcover. Condition: Very Good. No Dustjacket. Later Edition. ISBN 0780304306. Hardback. Very Good to Near Fine condition. Tight bright attractive copy with no markings to the book. This book is BiCMOS Integrated Circuit Design With Analog, Digital, and Smart Power Applications. No Signature.
Language: English
Published by IEEE Press, Butterworth Heinemann, Piscataway, NJ, 1994
- Hardcover
- First Edition
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Hardcover. Condition: Very Good. No Dust Jacket. First Edition. Hardcover without jacket. Light shelfwear to covers; very light wear to top and bottom of spine. Previous owner's name to FEP. Contents are otherwise clean, bright and tight. J. Used.
Analog Circuit Design: Low-Power Low-Voltage, Integrated Filters and Smart Power
Rudy J. Van De Plassche; Willy M. C. Sansen; Johan H. Huijsing
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Condition: Très bon. Bicomos Integrated Circuit Design With Analog, Digital, and Smart Power Applications | Elmasry | IEEE Press, 1994. In-4° cartonné, 513 pages. Couverture propre. Dos solide. Intérieur frais. Exemplaire de bibliothèque : petit code barre en pied de 1re de couv., cotation au dos, rares et discrets petits tampon…s à l'intérieur de l'ouvrage. Très bon état général pour cet ouvrage [NM49] Pour les expéditions internationales, nous consulter au préalable pour l ajustement des frais de port qui seront peut-être revus à la baisse/ For international shipments, please contact us in advance to adjust shipping costs. |.
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Hardcover Nov 30, 1994. Condition: Used: Good. Analog Circuit Design: Low-Power Low-Voltage, Integrated Filters and Smart Power | J. van de Plassche et alii | Kluwer Academic, 1995, in-8 cartonnage éditeur, 400 pages. Couverture propre. Dos solide. Intérieur frais. Exemplaire de bibliothèque : petit code barre en pied de 1re de…couv., cotation au dos, rares et discrets petits tampons à l'intérieur de l'ouvrage. Bel état ! [BT35].
SMART Integrated Circuit Design and Methodology
Noulis, Thomas (EDT); Psychalinos, Costas (EDT); Hatzopoulos, Alkis (EDT)
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SMART Integrated Circuit Design and Methodology
Noulis, Thomas (EDT); Psychalinos, Costas (EDT); Hatzopoulos, Alkis (EDT)
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Hardcover. Condition: Acceptable. Connecting readers with great books since 1972. Used textbooks may not include companion materials such as access codes, etc. May have condition issues including wear and notes/highlighting. We ship orders daily and Customer Service is our top priority.
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Hardcover. Condition: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority.
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SMART Integrated Circuit Design and Methodology
Noulis, Thomas (EDT); Psychalinos, Costas (EDT); Hatzopoulos, Alkis (EDT)
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SMART Integrated Circuit Design and Methodology
Noulis, Thomas (EDT); Psychalinos, Costas (EDT); Hatzopoulos, Alkis (EDT)
- Hardcover
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- Hardcover
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Condition: Sehr gut. Zustand: Sehr gut | Seiten: 560 | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.
Smart Integrated Circuit Design and Methodology
Noulis, Thomas (Editor)/ Psychalinos, Costas (Editor)/ Hatzopoulos, Alkis (Editor)
- Hardcover
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Hardcover. Condition: Brand New. 204 pages. 9.19x6.13x0.63 inches. In Stock.
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Condition: Good. Your purchase helps support Sri Lankan Children's Charity 'The Rainbow Centre'. Ex-library, so some stamps and wear, but in good overall condition. Our donations to The Rainbow Centre have helped provide an education and a safe haven to hundreds of children who live in appalling conditions.
- Softcover
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Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN… transceivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of 'analog clock cycles' required to produce one effective output sample of the signal being quantized.
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Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - The realization of signal sampling and quantization at high sample rates with low power dissipation is an important goal in many applications, includ ing portable video devices such as camcorders, personal communication devices such as wireless LAN transc…eivers, in the read channels of magnetic storage devices using digital data detection, and many others. This paper describes architecture and circuit approaches for the design of high-speed, low-power pipeline analog-to-digital converters in CMOS. Here the term high speed is taken to imply sampling rates above 1 Mhz. In the first section the dif ferent conversion techniques applicable in this range of sample rates is dis cussed. Following that the particular problems associated with power minimization in video-rate pipeline ADCs is discussed. These include optimi zation of capacitor sizes, design of low-voltage transmission gates, and opti mization of switched capacitor gain blocks and operational amplifiers for minimum power dissipation. As an example of the application of these tech niques, the design of a power-optimized lO-bit pipeline AID converter (ADC) that achieves =1. 67 mW per MS/s of sampling rate from 1 MS/s to 20 MS/s is described. 2. Techniques for CMOS Video-Rate AID Conversion Analog-to-digital conversion techniques can be categorized in many ways. One convenient means of comparing techniques is to examine the number of 'analog clock cycles' required to produce one effective output sample of the signal being quantized.
Analog Circuit Design: Low-Power Low-Voltage, Integrated Filters and Smart Power
Plassche, Rudy J. van de (Editor) / Sansen, Willy M.C. (Editor) / Huijsing, Johan (Editor)
- Softcover
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Add to basketHardcover. Condition: Fine. IEEE 1994 511pp; 4to. No marks. Not ex-library.
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Thomas Noulis is an academic and a semiconductor industry expert (INTEL Corp., INFINEON AG, HELIC Inc. (acquired by ANSYS)) with more than 12 years of international experience in design system development, analog/RFMS… circuit design, des.
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Taschenbuch. Condition: Neu. Analog Circuit Design | Low-Power Low-Voltage, Integrated Filters and Smart Power | Rudy J. Van De Plassche (u. a.) | Taschenbuch | viii | Englisch | 2010 | Springer | EAN 9781441951496 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartman…n[at]springer[dot]com | Anbieter: preigu Print on Demand.
