Yield Simulation Integrated Circuits by Walker D M (22 results)
- Hardcover
Seller: avelibro OHG, Dinkelscherben, Germanyavelibro OHG
Contact seller5-star sellerAssociation member: BOEV
Condition: Used - Fine
US$ 37.64
US$ 11.42 shippingShips from Germany to U.S.A.Quantity: 1 available
4°, Gebundene Ausgabe. Condition: Sehr gut. 221 Seiten Ausgetragenes Bibliotheksexemplar, Einband leicht lagerspurig, Papier in sehr gutem Zustand. B05-03-05C Sprache: Englisch Gewicht in Gramm: 509.
- Hardcover
Seller: SHIMEDIA, Brooklyn, NY, U.S.A.SHIMEDIA
Contact seller5-star sellerCondition: New
US$ 99.99
Free ShippingShips within U.S.A.Quantity: 1 available
Condition: New. Satisfaction Guaranteed or your money back.
- Hardcover
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
Contact seller5-star sellerCondition: New
US$ 188.18
US$ 15.88 shippingShips from United Kingdom to U.S.A.Quantity: Over 20 available
Condition: New. In.
- Hardcover
Seller: California Books, Miami, FL, U.S.A.California Books
Contact seller4-star sellerCondition: New
US$ 202.00
Free ShippingShips within U.S.A.Quantity: Over 20 available
Condition: New.
- Hardcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
Contact seller4-star sellerCondition: New
US$ 236.72
US$ 3.99 shippingShips within U.S.A.Quantity: 4 available
Condition: New. pp. 228.
- Softcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
Contact seller4-star sellerCondition: New
US$ 237.89
US$ 3.99 shippingShips within U.S.A.Quantity: 4 available
Condition: New. pp. 224.
- Hardcover
Seller: Kennys Bookshop and Art Galleries Ltd., Galway, GY, IrelandKennys Bookshop and Art Galleries Ltd.
Contact seller5-star sellerCondition: New
US$ 235.42
US$ 11.99 shippingShips from Ireland to U.S.A.Quantity: 15 available
Condition: New. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 209 pages, biography. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 14. Weight in Grams: 498. . 1987. Hardback. . . . .
- Softcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
Contact seller5-star sellerCondition: New
US$ 196.59
US$ 70.50 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips with acceptable yie…lds. The control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself.
- Hardcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
Contact seller5-star sellerCondition: New
US$ 198.46
US$ 71.43 shippingShips from Germany to U.S.A.Quantity: 1 available
Buch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips with acceptable yields. Th…e control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself.
- Hardcover
Seller: Kennys Bookstore, Olney, MD, U.S.A.Kennys Bookstore
Contact seller5-star sellerCondition: New
US$ 281.34
US$ 10.50 shippingShips within U.S.A.Quantity: 15 available
Condition: New. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 209 pages, biography. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 14. Weight in Grams: 498. . 1987. Hardback. . . . . Books ship from the US and Ireland.
- Hardcover
Seller: Mispah books, Redhill, SURRE, United KingdomMispah books
Contact seller4-star sellerCondition: Used - Very good
US$ 268.93
US$ 33.13 shippingShips from United Kingdom to U.S.A.Quantity: 1 available
Hardcover. Condition: Very Good. Very Good. book.
- Softcover
Seller: Mispah books, Redhill, SURRE, United KingdomMispah books
Contact seller4-star sellerCondition: Used - As new
US$ 282.58
US$ 33.13 shippingShips from United Kingdom to U.S.A.Quantity: 1 available
Paperback. Condition: Like New. Like New. book.
- Softcover
- Print on Demand
Seller: Brook Bookstore On Demand, Napoli, NA, ItalyBrook Bookstore On Demand
Contact seller5-star sellerCondition: New
US$ 148.51
US$ 6.28 shippingShips from Italy to U.S.A.Quantity: Over 20 available
Condition: new. Questo è un articolo print on demand.
- Hardcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
Contact seller5-star sellerCondition: New
US$ 188.77
US$ 26.27 shippingShips from Germany to U.S.A.Quantity: 2 available
Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips with accep…table yields. The control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself. 226 pp. Englisch.
Language: English
Published by Springer, Chapman And Hall/CRC Dez 2010, 2010
- Softcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
Contact seller5-star sellerCondition: New
US$ 188.77
US$ 26.27 shippingShips from Germany to U.S.A.Quantity: 2 available
Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips wit…h acceptable yields. The control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself. 224 pp. Englisch.
- Hardcover
- Print on Demand
Seller: preigu, Osnabrück, Germanypreigu
Contact seller5-star sellerCondition: New
US$ 166.09
US$ 79.94 shippingShips from Germany to U.S.A.Quantity: 5 available
Buch. Condition: Neu. Yield Simulation for Integrated Circuits | D. M. Walker | Buch | xii | Englisch | 1987 | Springer | EAN 9780898382440 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu Print on Demand.
- Softcover
- Print on Demand
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
Contact seller5-star sellerCondition: New
US$ 188.77
US$ 68.52 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips with ac…ceptable yields. The control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 224 pp. Englisch.
- Hardcover
- Print on Demand
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
Contact seller5-star sellerCondition: New
US$ 188.77
US$ 68.52 shippingShips from Germany to U.S.A.Quantity: 1 available
Buch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the summer of 1981 I was asked to consider the possibility of manufacturing a 600,000 transistor microprocessor in 1985. It was clear that the technology would only be capable of manufacturing 100,000-200,000 transistor chips with acceptabl…e yields. The control store ROM occupied approximately half of the chip area, so I considered adding spare rows and columns to increase ROM yield. Laser-programmed polysilicon fuses would be used to switch between good and bad circuits. Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. The fabrication technology did not yet exist, so I was unable to experimentally verify the benefits of redundancy. When the technology did become available, it would be too late in the development schedule to spend time running test chips. The yield analysis had to be done analytically or by simulation. Analytic yield analysis techniques did not offer sufficient accuracy for dealing with complex structures. The simulation techniques then available were very labor-intensive and seemed more suitable for redundant memories and other very regular structures [Stapper 80J. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator. Since I was unable to convince anyone to build such a simulator for me, I embarked on the research myself.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 226 pp. Englisch.
- Hardcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
Contact seller4-star sellerCondition: New
US$ 250.85
US$ 8.61 shippingShips from United Kingdom to U.S.A.Quantity: 4 available
Condition: New. Print on Demand pp. 228 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
- Softcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
Contact seller4-star sellerCondition: New
US$ 252.85
US$ 8.61 shippingShips from United Kingdom to U.S.A.Quantity: 4 available
Condition: New. Print on Demand pp. 224 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
- Softcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
Contact seller4-star sellerCondition: New
US$ 267.07
US$ 11.36 shippingShips from Germany to U.S.A.Quantity: 4 available
Condition: New. PRINT ON DEMAND pp. 224.
- Hardcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
Contact seller4-star sellerCondition: New
US$ 266.19
US$ 11.36 shippingShips from Germany to U.S.A.Quantity: 4 available
Condition: New. PRINT ON DEMAND pp. 228.
