Using Vlsi to Reduce Serialization and Memory Traffic in Shared Memory Parallel Computers (Classic Reprint) - Hardcover
Synopsis
Unlock the potential of massively parallel computing with an in-depth look at shared-memory design.
This book examines how to reduce bottlenecks and enable scalable performance in a high-degree parallel system. It explains the Ultracomputer’s model, hardware ideas, and software strategies that keep many processors working together efficiently.
- Learn the core ideas behind a scalable, general‑purpose parallel machine and how to avoid serial bottlenecks.
- See how a fetch‑and‑add operation powers synchronized, fully parallel algorithms without heavy locking.
- Understand the hardware/software approach that makes a large network of processors share memory effectively.
- Explore the design of a custom VLSI switching network and its role in delivering high bandwidth with low latency.
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