Simulation and Analysis of Different Switch Architectures for Interconnection Networks in MIMD Shared Memory Machines (Classic Reprint) - Hardcover
Synopsis
How interconnection networks affect speed and efficiency in multi-processor systems.
This guide explains how different switch architectures in a delta network influence latency and throughput. It covers unbuffered designs, various buffering strategies, and how network width and crossbar size interact with performance in practical settings.
Drawing on modeling and simulation, the discussion compares how signals traverse omega networks built from 2x2 switches. It highlights how buffers, queueing, and routing choices can limit or improve message delivery, especially under realistic traffic patterns and hot-spot conditions. The material also notes the trade-offs between hardware complexity and achievable bandwidth.
- Different switch types (unbuffered, k-input buffers, one-input buffers) and their impact on bandwidth and delay
- How crossbar size and data path width affect latency, throughput, and hardware design
- Simulation results for a 64-PE omega network under varied loads and traffic patterns
Ideal for readers exploring how interconnection networks shape performance in shared-memory multiprocessor systems, and for those evaluating architectural trade-offs in network design.
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Simulation and Analysis of Different Switch Architectures for Interconnection Networks in MIMD Shared Memory Machines (Classic Reprint)
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