Intelligent Engineering of Advanced Surrounding Gate Tunnel FETs (Paperback)
Language: English
Published by LAP Lambert Academic Publishing, 2026
- Softcover
- New

Seller: CitiRetail, Stevenage, United KingdomCitiRetail
AbeBooks seller since June 29, 2022
Condition: New
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Paperback. This book explores the design and optimization of advanced Surrounding Gate Tunnel Field-Effect Transistors (SGTFETs) for future low-power semiconductor technologies. It presents analytical models and TCAD-based investigations of conventional SGTFETs, Triple Material SGTFETs (TMSGTFETs), and III-V High-k SGTFETs, with emphasis on improving switching performance, reducing leakage, and enhancing energy efficiency. The work integrates evolutionary multiobjective optimization using NSGA-III and machine-learning-assisted Pareto Active Learning to identify optimal trade-offs among delay, dynamic power, on-off current ratio, switching speed, and device variability. By combining device physics, computational intelligence, and optimization techniques, the book offers a scalable framework for the development of high-performance nanoscale transistor architectures suitable for next-generation integrated circuits and emerging nanoelectronic applications. This item is printed on demand. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability. …
Seller Inventory # 9786630209815
- Title
- Intelligent Engineering of Advanced Surrounding Gate Tunnel FETs (Paperback)
- Author
- Charumathi V.
- Publisher
- LAP Lambert Academic Publishing
- Publication year
- 2026
- Condition
- new
- Binding
- Paperback
- Language
- English
- ISBN 10
- 6630209818
- ISBN 13
- 9786630209815
"Synopsis" may belong to another edition of this title.
CitiRetail
Stevenage, United Kingdom
AbeBooks seller since June 29, 2022
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| Item | 7 to 14 business days | 7 to 60 business days |
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