Charumathi V (8 results)

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Seller: PBShop.store US, Wood Dale, IL, U.S.A.PBShop.store US
Contact seller5-star sellerCondition: New
US$ 121.38
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PAP. Condition: New. New Book. Shipped from UK. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

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Seller: PBShop.store UK, Fairford, GLOS, United KingdomPBShop.store UK
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US$ 120.15
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PAP. Condition: New. New Book. Delivered from our UK warehouse in 4 to 14 business days. THIS BOOK IS PRINTED ON DEMAND. Established seller since 2000.

Language: English
Published by LAP LAMBERT Academic Publishing Sep 2026, 2026
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Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
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US$ 107.62
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware 240 pp. Englisch.

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Seller: Grand Eagle Retail, Bensenville, IL, U.S.A.Grand Eagle Retail
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US$ 144.84
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Paperback. Condition: new. Paperback. This book explores the design and optimization of advanced Surrounding Gate Tunnel Field-Effect Transistors (SGTFETs) for future low-power semiconductor technologies. It presents analytical models and TCAD-based investigations of conventional SGTFETs, Triple Material SGTFETs (TMSGTFETs), and III-V High-k SGTFETs, with emphasis on improving switching performance, reducing leakage, and enhancing energy efficiency. The work integrates evolutionary multiobjective optimization using NSGA-III and machine-learning-assisted Pareto Active Learning to identify optimal trade-offs among delay, dynamic power, on-off current ratio, switching speed, and device variability. By combining device physics, computational intelligence, and optimization techniques, the book offers a scalable framework for the development of high-performance nanoscale transistor architectures suitable for next-generation integrated circuits and emerging nanoelectronic applications. This item is printed on demand. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.…

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Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
Contact seller5-star sellerCondition: New
US$ 116.01
US$ 38.94 shippingShips from Germany to U.S.A.Quantity: 2 available
Taschenbuch. Condition: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book explores the design and optimization of advanced Surrounding Gate Tunnel Field-Effect Transistors (SGTFETs) for future low-power semiconductor technologies. It presents analytical models and TCAD-based investigations of conventional SGTFETs, Triple Material SGTFETs (TMSGTFETs), and III-V High-k SGTFETs, with emphasis on improving switching performance, reducing leakage, and enhancing energy efficiency. The work integrates evolutionary multiobjective optimization using NSGA-III and machine-learning-assisted Pareto Active Learning to identify optimal trade-offs among delay, dynamic power, on-off current ratio, switching speed, and device variability. By combining device physics, computational intelligence, and optimization techniques, the book offers a scalable framework for the development of high-performance nanoscale transistor architectures suitable for next-generation integrated circuits and emerging nanoelectronic applications.…

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Seller: preigu, Osnabrück, Germanypreigu
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US$ 88.65
US$ 77.89 shippingShips from Germany to U.S.A.Quantity: 5 available
Taschenbuch. Condition: Neu. Intelligent Engineering of Advanced Surrounding Gate Tunnel FETs | From Core Device Physics to Machine Learning-Assisted Many-Objective Evolutionary Optimization | Charumathi V (u. a.) | Taschenbuch | Englisch | 2026 | LAP LAMBERT Academic Publishing | EAN 9786630209815 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu Print on Demand.…

Language: English
Published by LAP LAMBERT Academic Publishing Sep 2026, 2026
- Softcover
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Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
Contact seller5-star sellerCondition: New
US$ 107.62
US$ 66.76 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book explores the design and optimization of advanced Surrounding Gate Tunnel Field-Effect Transistors (SGTFETs) for future low-power semiconductor technologies. It presents analytical models and TCAD-based investigations of conventional SGTFETs, Triple Material SGTFETs (TMSGTFETs), and III-V High-k SGTFETs, with emphasis on improving switching performance, reducing leakage, and enhancing energy efficiency. The work integrates evolutionary multiobjective optimization using NSGA-III and machine-learning-assisted Pareto Active Learning to identify optimal trade-offs among delay, dynamic power, on-off current ratio, switching speed, and device variability. By combining device physics, computational intelligence, and optimization techniques, the book offers a scalable framework for the development of high-performance nanoscale transistor architectures suitable for next-generation integrated circuits and emerging nanoelectronic applications. 240 pp. Englisch.…

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Seller: CitiRetail, Stevenage, United KingdomCitiRetail
Contact seller5-star sellerCondition: New
US$ 128.12
US$ 49.23 shippingShips from United Kingdom to U.S.A.Quantity: 1 available
Paperback. Condition: new. Paperback. This book explores the design and optimization of advanced Surrounding Gate Tunnel Field-Effect Transistors (SGTFETs) for future low-power semiconductor technologies. It presents analytical models and TCAD-based investigations of conventional SGTFETs, Triple Material SGTFETs (TMSGTFETs), and III-V High-k SGTFETs, with emphasis on improving switching performance, reducing leakage, and enhancing energy efficiency. The work integrates evolutionary multiobjective optimization using NSGA-III and machine-learning-assisted Pareto Active Learning to identify optimal trade-offs among delay, dynamic power, on-off current ratio, switching speed, and device variability. By combining device physics, computational intelligence, and optimization techniques, the book offers a scalable framework for the development of high-performance nanoscale transistor architectures suitable for next-generation integrated circuits and emerging nanoelectronic applications. This item is printed on demand. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability.…