Seller: Zubal-Books, Since 1961, Cleveland, OH, U.S.A.
Condition: Very Good. *Price HAS BEEN REDUCED by 10% until Monday, April 28 (sale item)* 480 pp., Hardcover, minor library markings else text clean & binding tight. - If you are reading this, this item is actually (physically) in our stock and ready for shipment once ordered. We are not bookjackers. Buyer is responsible for any additional duties, taxes, or fees required by recipient's country.
Seller: Lucky's Textbooks, Dallas, TX, U.S.A.
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Seller: Ria Christie Collections, Uxbridge, United Kingdom
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Add to basketTaschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.
Seller: Mispah books, Redhill, SURRE, United Kingdom
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Add to basketPaperback. Condition: Like New. Like New. book.
Seller: Mispah books, Redhill, SURRE, United Kingdom
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Add to basketHardcover. Condition: Like New. Like New. book.
Published by Springer Us Mär 1989, 1989
ISBN 10: 0792390067 ISBN 13: 9780792390060
Language: English
Seller: AHA-BUCH GmbH, Einbeck, Germany
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Add to basketBuch. Condition: Neu. Neuware - From the perspective of complex systems, conventional Ie's can be regarded as 'discrete' devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term 'wafer level' is perhaps more appropriate than 'wafer-scale'. A 'wafer-level' monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, 'wafer-scale' merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.
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Add to basketKluwer, Boston, 1989. XIV, 456 pages with some graphics, hardcover, (former library book)---Verlag: Kluwer Verlag: Kluwer 962 Gramm.