Seller: GreatBookPrices, Columbia, MD, U.S.A.
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Seller: Book Dispensary, Concord, ON, Canada
Soft cover. Condition: New. BRAND NEW softcover. Book.
Seller: GreatBookPrices, Columbia, MD, U.S.A.
Condition: As New. Unread book in perfect condition.
Hardcover/Hardback. Condition: Fair. Avtor povesti Nr. izvestnyj partizan Bryanshchiny. On vozglavlyal razvedku i diversionnoe delo v partizanskoj brigade 'Za Rodinu', prinimal uchastie vo mnogikh boevykh operatsiyakh. Povest 'Lesnoj front' pravdivo i yarko rasskazyvaet o narodnom podvige bryantsev v gody Velikoj Otechestvennoj vojny i v poslevoennoe vremya. Dlya massovogo chitatelya.
Seller: Chiron Media, Wallingford, United Kingdom
US$ 66.26
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Seller: GreatBookPricesUK, Woodford Green, United Kingdom
US$ 69.71
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Seller: GreatBookPricesUK, Woodford Green, United Kingdom
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Seller: Revaluation Books, Exeter, United Kingdom
US$ 92.62
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Add to basketPaperback. Condition: Brand New. 2014 edition. 364 pages. 9.00x6.00x0.75 inches. In Stock.
Seller: AHA-BUCH GmbH, Einbeck, Germany
Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work.
Seller: preigu, Osnabrück, Germany
Taschenbuch. Condition: Neu. A Pipelined Multi-core MIPS Machine | Hardware Implementation and Correctness Proof | Mikhail Kovalev (u. a.) | Taschenbuch | Lecture Notes in Computer Science | xii | Englisch | 2014 | Springer | EAN 9783319139050 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Published by Rostov on Don, 1970
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Nikolaevich. My Don Side. Rostov n / a: Book of Editions, 1970. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401227.
Published by Moscow, 1975
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Calculation of precision ball bearings. Moscow: Machine Building, 1975. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU6985788.
Published by Moscow, 1974
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Dynamic and static balancing of gyroscopic devices. Moscow: Machine Building, 1974. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401228.
Published by Moscow, 1970
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Gyro supports and suspensions. Moscow: Machine Building, 1970. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401229.
Published by Minsk, 1977
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Mikhailovich. Discrete optimization. Minsk: Publishing House of the Belarusian State University, 1977. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7676991.
Published by Kyiv, 1976
Seller: BiblioEra, Everett, MA, U.S.A.
Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Nikolaevich. Who is friends with whom. Kyiv: Veselka, 1976. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU6988673.
Condition: new. Questo è un articolo print on demand.
Language: English
Published by Springer International Publishing Dez 2014, 2014
ISBN 10: 3319139053 ISBN 13: 9783319139050
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germany
Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work. 364 pp. Englisch.
Seller: Majestic Books, Hounslow, United Kingdom
Condition: New. Print on Demand.
Seller: Biblios, Frankfurt am main, HESSE, Germany
Condition: New. PRINT ON DEMAND.
Language: English
Published by Springer International Publishing, 2014
ISBN 10: 3319139053 ISBN 13: 9783319139050
Seller: moluna, Greven, Germany
Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Demonstrates construction of a multi-core machine with pipelined MIPS processor Broadens the understanding of RISC machines Opens the way to the formal verification of synthesizable hardware for multi-core processorsThis monograp.
Language: English
Published by Springer, Springer Dez 2014, 2014
ISBN 10: 3319139053 ISBN 13: 9783319139050
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 364 pp. Englisch.