Mikhail Kovalev (24 results)
- Softcover
Seller: GreatBookPrices, Columbia, MD, U.S.A.GreatBookPrices
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- Softcover
Seller: Book Dispensary, Concord, ON, CanadaBook Dispensary
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Soft cover. Condition: New. BRAND NEW softcover. Book.
- Softcover
Seller: GreatBookPrices, Columbia, MD, U.S.A.GreatBookPrices
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Condition: As New. Unread book in perfect condition.
More imagesPublished by DOSAAF, 1983
- Hardcover
Seller: ISIA Media Verlag UG | Bukinist, Leipzig, GermanyISIA Media Verlag UG | Bukinist
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Hardcover/Hardback. Condition: Fair. Avtor povesti Nr. izvestnyj partizan Bryanshchiny. On vozglavlyal razvedku i diversionnoe delo v partizanskoj brigade 'Za Rodinu', prinimal uchastie vo mnogikh boevykh operatsiyakh. Povest 'Lesnoj front' pravdivo i yarko rasskazyvaet o narodnom podvige bryantsev v gody Velikoj Otechestvennoj…vojny i v poslevoennoe vremya. Dlya massovogo chitatelya.
- Softcover
Seller: Ria Christie Collections, Uxbridge, United KingdomRia Christie Collections
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Condition: New. In.
- Softcover
Seller: Chiron Media, Wallingford, United KingdomChiron Media
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PF. Condition: New.
- Softcover
Seller: GreatBookPricesUK, Woodford Green, United KingdomGreatBookPricesUK
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- Softcover
Seller: GreatBookPricesUK, Woodford Green, United KingdomGreatBookPricesUK
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Condition: As New. Unread book in perfect condition.
- Softcover
Seller: Books Puddle, New York, NY, U.S.A.Books Puddle
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- Softcover
Seller: Revaluation Books, Exeter, United KingdomRevaluation Books
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Paperback. Condition: Brand New. 2014 edition. 364 pages. 9.00x6.00x0.75 inches. In Stock.
- Softcover
Seller: AHA-BUCH GmbH, Einbeck, GermanyAHA-BUCH GmbH
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Taschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores an…d a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work.
More images- Softcover
Seller: preigu, Osnabrück, Germanypreigu
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Taschenbuch. Condition: Neu. A Pipelined Multi-core MIPS Machine | Hardware Implementation and Correctness Proof | Mikhail Kovalev (u. a.) | Taschenbuch | Lecture Notes in Computer Science | xii | Englisch | 2014 | Springer | EAN 9783319139050 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 He…idelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Published by Rostov on Don, 1970
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Nikolaevich. My Don Side. Rostov n / a: Book of Editions, 1970. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401227.
Published by Moscow, 1975
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Calculation of precision ball bearings. Moscow: Machine Building, 1975. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU6985788.
Published by Moscow, 1974
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Dynamic and static balancing of gyroscopic devices. Moscow: Machine Building, 1974. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401228.
Published by Moscow, 1970
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Prokhorovich. Gyro supports and suspensions. Moscow: Machine Building, 1970. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7401229.
Published by Minsk, 1977
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Mikhailovich. Discrete optimization. Minsk: Publishing House of the Belarusian State University, 1977. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU7676991.
Published by Kyiv, 1976
- Hardcover
Seller: BiblioEra, Everett, MA, U.S.A.BiblioEra
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US$ 199.00
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Hardcover. Condition: Good. In Russian. Kovalev, Mikhail Nikolaevich. Who is friends with whom. Kyiv: Veselka, 1976. All images are for identification of editions only. Several books of the same edition may be available. Please feel free to request photos of available books.SKU6988673.
- Softcover
- Print on Demand
Seller: Brook Bookstore On Demand, Napoli, NA, ItalyBrook Bookstore On Demand
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US$ 54.45
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Condition: new. Questo è un articolo print on demand.
Language: English
Published by Springer International Publishing Dez 2014, 2014
- Softcover
- Print on Demand
Seller: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermanyBuchWeltWeit Ludwig Meier e.K.
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US$ 63.01
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Taschenbuch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS pr…ocessor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work. 364 pp. Englisch.
- Softcover
- Print on Demand
Seller: Majestic Books, Hounslow, United KingdomMajestic Books
Contact seller4-star sellerCondition: New
US$ 91.60
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Condition: New. Print on Demand.
- Softcover
- Print on Demand
Seller: Biblios, frankfurt am main, HESSE, GermanyBiblios
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US$ 97.29
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Condition: New. PRINT ON DEMAND.
- Softcover
- Print on Demand
Seller: moluna, Greven, Germanymoluna
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US$ 56.98
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Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Demonstrates construction of a multi-core machine with pipelined MIPS processor Broadens the understanding of RISC machines Opens the way to the formal verification of synthesizable hardware for multi-core processorsT…his monograp.
- Softcover
- Print on Demand
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germanybuchversandmimpf2000
Contact seller5-star sellerCondition: New
US$ 63.01
US$ 68.62 shippingShips from Germany to U.S.A.Quantity: 1 available
Taschenbuch. Condition: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS proces…sor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future.Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 364 pp. Englisch.
