Order Total (1 Item Items):
Shipping Destination:
Vijeyakumar (91 results)
Skip to main search results
Search filters
Product Type
- All Product Types
- Books (91)
- Magazines & Periodicals (No further results match this refinement)
- Comics (No further results match this refinement)
- Sheet Music (No further results match this refinement)
- Art, Prints & Posters (No further results match this refinement)
- Photographs (No further results match this refinement)
- Maps (No further results match this refinement)
- Manuscripts & Paper Collectibles (No further results match this refinement)
Condition Learn more
- New (90)
- As New, Fine or Near Fine (No further results match this refinement)
- Very Good or Good (No further results match this refinement)
- Fair or Poor (No further results match this refinement)
- As Described (1)
Binding
- All Bindings
- Hardcover (No further results match this refinement)
- Softcover (91)
Collectible Attributes
- First Edition (No further results match this refinement)
- Signed (No further results match this refinement)
- Dust Jacket (No further results match this refinement)
- Seller-Supplied Images (51)
- Not Print on Demand (39)
Language (6)
Free Shipping
Seller Location
Seller Rating
-
Architectures arithm?tiques approximatives CMOS ? faible encombrement
Language: French
Published by Editions Notre Savoir, 2024
ISBN 10: 620830086X ISBN 13: 9786208300869
PAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Architectures arithm?tiques approximatives CMOS ? faible encombrement
Language: French
Published by Editions Notre Savoir, 2024
ISBN 10: 620830086X ISBN 13: 9786208300869
Seller: PBShop.store UK, Fairford, GLOS, United Kingdom
Seller rating 4 out of 5 stars
US$ 42.68
US$ 4.36 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketPAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Architectures arithmétiques approximatives CMOS à faible encombrement (French Edition)
Language: French
Published by Editions Notre Savoir, 2024
ISBN 10: 620830086X ISBN 13: 9786208300869
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 39.91
US$ 15.87 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
PAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS
Language: Portuguese
Published by Edi??es Nosso Conhecimento, 2024
ISBN 10: 6208300924 ISBN 13: 9786208300920
PAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
PAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)
Language: English
Published by LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
US$ 70.65
US$ 13.25 shipping
Ships from United Kingdom to U.S.A.Quantity: 1 available
Add to basketPaperback. Condition: Brand New. 52 pages. 8.66x5.91x0.12 inches. In Stock.
-
CMOS fl?cheneffiziente approximative Arithmetikarchitekturen
Seller: PBShop.store UK, Fairford, GLOS, United Kingdom
Seller rating 4 out of 5 stars
US$ 42.68
US$ 4.36 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketPAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Arquitecturas aritm?ticas aproximadas eficientes em termos de ?rea CMOS
Language: Portuguese
Published by Edi??es Nosso Conhecimento, 2024
ISBN 10: 6208300924 ISBN 13: 9786208300920
Seller: PBShop.store UK, Fairford, GLOS, United Kingdom
Seller rating 4 out of 5 stars
US$ 42.68
US$ 4.36 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketPAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Architetture aritmetiche approssimate efficienti in area CMOS
Seller: PBShop.store UK, Fairford, GLOS, United Kingdom
Seller rating 4 out of 5 stars
US$ 42.68
US$ 4.36 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketPAP. Condition: New. New Book. Shipped from UK. Established seller since 2000.
-
Single Precision Floating Point Multiplier
Language: English
Published by Anchor Academic Publishing, 2017
ISBN 10: 3960671555 ISBN 13: 9783960671558
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 74.69
US$ 15.87 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Single Precision Floating Point Multiplier
Language: English
Published by Anchor Academic Publishing 2017-07-14, 2017
ISBN 10: 3960671555 ISBN 13: 9783960671558
US$ 73.83
US$ 20.52 shipping
Ships from United Kingdom to U.S.A.Quantity: 10 available
Add to basketPaperback. Condition: New.
-
Arquitecturas aritméticas aproximadas eficientes em termos de área CMOS (Portuguese Edition)
Language: Portuguese
Published by Edicoes Nosso Conhecimento, 2024
ISBN 10: 6208300924 ISBN 13: 9786208300920
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 39.91
US$ 15.87 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Architetture aritmetiche approssimate efficienti in area CMOS (Italian Edition)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 39.91
US$ 15.87 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
CMOS flächeneffiziente approximative Arithmetikarchitekturen (German Edition)
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 39.91
US$ 15.87 shipping
Ships from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketCondition: New. In.
-
Implementación en ASIC de una FP-AU de bajo consumo utilizando lógica reversible
Language: Spanish
Published by Ediciones Nuestro Conocimiento, 2022
ISBN 10: 6205358352 ISBN 13: 9786205358351
Condition: New.
-
CMOS Area Efficient Approximate Arithmetic Architectures
Language: English
Published by LAP LAMBERT Academic Publishing, 2017
ISBN 10: 3330331798 ISBN 13: 9783330331792
Taschenbuch. Condition: Neu. CMOS Area Efficient Approximate Arithmetic Architectures | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | 60 S. | Englisch | 2017 | LAP LAMBERT Academic Publishing | EAN 9783330331792 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU)
Language: English
Published by LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Taschenbuch. Condition: Neu. ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU) | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | 52 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139587056 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
Single Precision Floating Point Multiplier
Language: English
Published by Anchor Academic Publishing, 2017
ISBN 10: 3960671555 ISBN 13: 9783960671558
US$ 130.99
US$ 33.12 shipping
Ships from United Kingdom to U.S.A.Quantity: 1 available
Add to basketpaperback. Condition: New. New. book.
-
Arquitecturas de aritmética aproximada con eficiencia de área CMOS
Language: Spanish
Published by Ediciones Nuestro Conocimiento Nov 2024, 2024
ISBN 10: 6208300878 ISBN 13: 9786208300876
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Neuware -El cálculo aproximado proporciona una solución alternativa para reducir el consumo de energía de los dispositivos de aplicación DSP actuales de alto rendimiento. Las técnicas convencionales de multiplicación y suma consumen mucha energía. En este artículo se explora el diseño de unidades aritméticas aproximadas para aplicaciones de procesado de señal. En primer lugar se propone un sumador aproximado cambiando la lógica de la célula sumadora completa básica. La célula sumadora propuesta tiene menos transistores en comparación con un enfoque similar reciente. A continuación, se diseña un multiplicador aproximado con bajo error utilizando detección de plomo y seleccionando n/2 bits para una entrada de n bits. El multiplicador aproximado de n/2 bits propuesto tiene un buen rendimiento en términos de error y potencia en comparación con un enfoque similar reciente. A continuación, las unidades aproximadas se implementan en una unidad Multiplicar-Acumular (MAC). La unidad MAC aproximada propuesta proporciona una mejora significativa en potencia, área y retardo a costa de una pequeña degradación en la precisión. Por último, la unidad MAC propuesta se implementa en una aplicación de filtrado para verificar su funcionalidad.Books on Demand GmbH, Überseering 33, 22297 Hamburg 56 pp. Spanisch.
-
Implémentation ASIC d\ un FP-AU à faible puissance utilisant une logique réversible
Language: French
Published by Editions Notre Savoir, 2022
ISBN 10: 6205358344 ISBN 13: 9786205358344
Condition: New.
-
CMOS Area Efficient Approximate Arithmetic Architectures
Language: English
Published by LAP LAMBERT Academic Publishing, 2017
ISBN 10: 3330331798 ISBN 13: 9783330331792
US$ 152.82
US$ 33.12 shipping
Ships from United Kingdom to U.S.A.Quantity: 1 available
Add to basketpaperback. Condition: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
-
Arquitecturas de aritmética aproximada con eficiencia de área CMOS
Language: Spanish
Published by Ediciones Nuestro Conocimiento, 2024
ISBN 10: 6208300878 ISBN 13: 9786208300876
Taschenbuch. Condition: Neu. Arquitecturas de aritmética aproximada con eficiencia de área CMOS | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | Spanisch | 2024 | Ediciones Nuestro Conocimiento | EAN 9786208300876 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
Implementación en ASIC de una FP-AU de bajo consumo utilizando lógica reversible | Punto flotante (FP)-Unidades aritméticas (AU)
Language: Spanish
Published by Ediciones Nuestro Conocimiento, 2022
ISBN 10: 6205358352 ISBN 13: 9786205358351
Taschenbuch. Condition: Neu. Implementación en ASIC de una FP-AU de bajo consumo utilizando lógica reversible | Punto flotante (FP)-Unidades aritméticas (AU) | Vijeyakumar Krishnasamy Natarajan | Taschenbuch | Spanisch | 2022 | Ediciones Nuestro Conocimiento | EAN 9786205358351 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
Architectures arithmétiques approximatives CMOS à faible encombrement
Language: French
Published by Editions Notre Savoir Nov 2024, 2024
ISBN 10: 620830086X ISBN 13: 9786208300869
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Neuware -Le calcul approximatif offre une solution alternative pour réduire la consommation d'énergie des dispositifs d'application DSP actuels à haute performance. Les techniques conventionnelles de multiplication et d'addition consomment beaucoup d'énergie. Dans ce mémoire, la conception d'unités arithmétiques approximatives pour les applications de traitement des signaux est explorée. Tout d'abord, un additionneur approximatif est proposé en modifiant la logique de la cellule de base de l'additionneur complet. La cellule d'addition proposée compte moins de transistors que les approches similaires récentes. Ensuite, un multiplicateur approximatif à faible erreur est conçu en utilisant la détection du premier bit et en sélectionnant n/2 bits pour une entrée de n bits. Le multiplicateur approximatif à n/2 bits proposé donne de bons résultats en termes d'erreur et de puissance par rapport à une approche similaire récente. Les unités approximatives sont ensuite mises en ¿uvre dans une unité MAC (Multiply-Accumulate). L'unité MAC approximative proposée offre une amélioration significative en termes de puissance, de surface et de délai au prix d'une faible dégradation de la précision. Enfin, l'unité MAC proposée est mise en ¿uvre dans une application de filtrage afin de vérifier sa fonctionnalité.Books on Demand GmbH, Überseering 33, 22297 Hamburg 56 pp. Französisch.
-
Architectures arithmétiques approximatives CMOS à faible encombrement
Language: French
Published by Editions Notre Savoir, 2024
ISBN 10: 620830086X ISBN 13: 9786208300869
Taschenbuch. Condition: Neu. Architectures arithmétiques approximatives CMOS à faible encombrement | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | Einband - flex.(Paperback) | Französisch | 2024 | Editions Notre Savoir | EAN 9786208300869 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
Implémentation ASIC d'un FP-AU à faible puissance utilisant une logique réversible | Virgule flottante (FP) - Unités arithmétiques (AU)
Language: French
Published by Editions Notre Savoir, 2022
ISBN 10: 6205358344 ISBN 13: 9786205358344
Taschenbuch. Condition: Neu. Implémentation ASIC d'un FP-AU à faible puissance utilisant une logique réversible | Virgule flottante (FP) - Unités arithmétiques (AU) | Vijeyakumar Krishnasamy Natarajan | Taschenbuch | Französisch | 2022 | Editions Notre Savoir | EAN 9786205358344 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
ASIC Implementação de FP-AU de Baixa Potência usando Lógica Reversivel
Language: Portuguese
Published by Edições Nosso Conhecimento, 2022
ISBN 10: 6205358379 ISBN 13: 9786205358375
Condition: New.
-
Architetture aritmetiche approssimate efficienti in area CMOS
Language: Italian
Published by Edizioni Sapienza Nov 2024, 2024
ISBN 10: 6208300932 ISBN 13: 9786208300937
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Neuware -Il calcolo approssimato fornisce una soluzione alternativa per ridurre il consumo energetico degli attuali dispositivi DSP ad alte prestazioni. Le tecniche convenzionali di moltiplicazione e addizione consumano molta energia. In questo breve lavoro si esamina la progettazione di unità aritmetiche approssimate per applicazioni di elaborazione del segnale. In primo luogo viene proposto un sommatore approssimato modificando la logica della cella sommatore completa di base. La cella adder proposta ha un numero di transistor inferiore rispetto a un approccio simile recente. Successivamente, viene progettato un moltiplicatore approssimato a basso errore utilizzando il rilevamento del lead one e selezionando n/2 bit per un ingresso di n bit. Il moltiplicatore approssimato a n/2 bit proposto si comporta bene in termini di errore e potenza rispetto a un approccio simile recente. Inoltre, le unità approssimate sono implementate in un'unità Multiply-Accumulate (MAC). L'unità MAC approssimata proposta offre un miglioramento significativo in termini di potenza, area e ritardo, a costo di un lieve peggioramento dell'accuratezza. Infine, l'unità MAC proposta viene implementata in un'applicazione di filtraggio per verificarne la funzionalità.Books on Demand GmbH, Überseering 33, 22297 Hamburg 56 pp. Italienisch.
-
CMOS flächeneffiziente approximative Arithmetikarchitekturen
Language: German
Published by Verlag Unser Wissen Nov 2024, 2024
ISBN 10: 6208300843 ISBN 13: 9786208300845
Seller: buchversandmimpf2000, Emtmannsberg, BAYE, Germany
Seller rating 5 out of 5 stars
Taschenbuch. Condition: Neu. Neuware -Ungefähre Berechnungen bieten eine alternative Lösung zur Reduzierung des Energieverbrauchs von modernen DSP-Hochleistungsanwendungsgeräten. Herkömmliche Multiplikations- und Additionstechniken verbrauchen viel Energie. In diesem kurzen Entwurf werden ungefähre arithmetische Einheiten für die Signalverarbeitung untersucht. Zunächst wird ein ungefährer Addierer vorgeschlagen, indem die Logik der grundlegenden Volladdiererzelle geändert wird. Die vorgeschlagene Addiererzelle hat im Vergleich zu einem ähnlichen Ansatz aus jüngerer Zeit eine geringere Transistoranzahl. Als Nächstes wird ein Näherungsmultiplizierer mit geringem Fehler entworfen, der die Erkennung von Einsen und die Auswahl von n/2 Bits für eine n-Bit-Eingabe verwendet. Der vorgeschlagene n/2-Bit-Näherungsmultiplizierer weist im Vergleich zu einem ähnlichen Ansatz eine gute Leistung in Bezug auf Fehler und Leistung auf. Anschließend werden die Näherungseinheiten in einer Multiplizieren-Akkumulieren-Einheit (MAC) implementiert. Die vorgeschlagene ungefähre MAC-Einheit bietet eine erhebliche Verbesserung in Bezug auf Leistung, Fläche und Verzögerung bei nur geringer Verschlechterung der Genauigkeit. Schließlich wird die vorgeschlagene MAC-Einheit in einer Filteranwendung implementiert, um die Funktionalität zu überprüfen.Books on Demand GmbH, Überseering 33, 22297 Hamburg 56 pp. Deutsch.
