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Source Synchronous Networks on Chip Circuit Architectural by Mandal Ayan (18 results)
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US$ 66.55
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Add to basketCondition: Hervorragend. Zustand: Hervorragend | Seiten: 160 | Sprache: Englisch | Produktart: Bücher.
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US$ 117.40
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US$ 116.06
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US$ 125.04
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Source-synchronous Networks-on-chip : Circuit and Architectural Interconnect Modeling
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
Seller rating 5 out of 5 stars
US$ 128.43
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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 133.36
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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Seller: Ria Christie Collections, Uxbridge, United Kingdom
Seller rating 5 out of 5 stars
US$ 133.36
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US$ 126.62
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Add to basketTaschenbuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
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Source-Synchronous Networks-On-Chip : Circuit and Architectural Interconnect Modeling
Published by Springer New York, Springer US, 2013
ISBN 10: 1461494044 ISBN 13: 9781461494041
Language: English
US$ 126.62
Convert currencyUS$ 33.60 shipping from Germany to U.S.A.Quantity: 1 available
Add to basketBuch. Condition: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
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US$ 173.92
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Add to basketPaperback. Condition: Brand New. reprint edition. 156 pages. 9.25x6.10x0.38 inches. In Stock.
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US$ 175.37
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Add to basketHardcover. Condition: Brand New. 143 pages. 9.25x6.50x0.75 inches. In Stock.
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US$ 185.79
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Add to basketHardcover. Condition: Like New. Like New. book.
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Source-synchronous Networks-on-chip : Circuit and Architectural Interconnect Modeling
Seller: GreatBookPricesUK, Woodford Green, United Kingdom
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US$ 206.27
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US$ 195.35
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Add to basketPaperback. Condition: Like New. Like New. book.
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US$ 226.57
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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Published by Springer-Verlag New York Inc., 2016
ISBN 10: 1493948172 ISBN 13: 9781493948178
Language: English
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
Seller rating 5 out of 5 stars
US$ 154.97
Convert currencyUS$ 12.35 shipping from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketPaperback / softback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 256.
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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Published by Springer-Verlag New York Inc., 2013
ISBN 10: 1461494044 ISBN 13: 9781461494041
Language: English
Seller: THE SAINT BOOKSTORE, Southport, United Kingdom
Seller rating 5 out of 5 stars
US$ 154.97
Convert currencyUS$ 14.17 shipping from United Kingdom to U.S.A.Quantity: Over 20 available
Add to basketHardback. Condition: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 393.
